Operating and product brand
Etched, Inc.
Company name used in Etched website terms and privacy materials.
Inference systems
Etched is building rack-scale inference clusters.
Inference is the work of running a trained AI model to produce an answer. Etched designs the custom processor, memory system, boards, servers, racks and operating software used to perform that work.
The current system combines the first manufactured revision of Etched's processor with stacked high-bandwidth memory, links between processors, server control, power and liquid cooling. TSMC makes the processor using its N4P chip-manufacturing process.
- System
- Rack-scale inference cluster
- Silicon
- First manufactured revision (A0), made by TSMC using N4P
- Physical form
- Accelerator modules, servers and liquid-cooled racks
- Operating footprint
- San Jose, Milpitas and Taiwan
- Seed financing
- Sohu program
- First manufactured chips
- Customer-system validation
01 / System
From a model request to a rack
Etched designs the compute, memory and connectivity together. Servers and racks provide the control, power and cooling around that silicon.
- 01 Model request Input and context
- 02 Inference software Model placement and execution
- 03 Etched accelerator Custom processor with stacked memory beside it and fast memory built in
- 04 Links between processors Move model data across accelerators
- 05 Server tray Boards, internal connectors and control computer
- 06 Liquid-cooled rack Power, cooling and networking
| Layer | What it does | System elements |
|---|---|---|
| Accelerator | Runs model operations beside stacked memory that feeds it data quickly | Custom processor, high-bandwidth memory, fast on-chip memory and physical signal interfaces |
| Server | Connects, starts and manages accelerators | Accelerator boards, a main board, internal connectors, a management controller, startup firmware and high-speed networking |
| Rack | Supplies power, cooling and cluster connectivity | 48 V conversion, power shelves, liquid loop, manifolds and networking |
02 / Company
Public company names and operating footprint
Etched uses two legal names across its current website, patent, lender and investment records.
Names used in public records
IP and financing record
Etched.AI, Inc.
Company name used in patent, lender and investment records.
Operating footprint
San Jose
3155 Olsen Drive
Company operations and product development.
Milpitas
195 S Milpitas Boulevard
10 MW new-product introduction, in-house circuit-board assembly and deployment facility.
Taiwan
Hardware and production
Factory, hardware engineering and partner manufacturing operations.
03 / Capital
Equity, investment channels and venture debt
Etched has funded silicon, manufacturing and system deployment through four reported equity rounds and venture-credit facilities.
-
$5.4m
Seed
Reported $34m valuation.
-
$120m
Series A
Led by Primary Venture Partners and Positive Sum Ventures, with Peter Thiel, Amjad Masad, Thomas Dohmke and Balaji Srinivasan named as participants.
-
$500m
Financing round
Closed in December at a reported $5bn post-money valuation. Stripes led, with Peter Thiel, Positive Sum Ventures and Ribbit Capital. Jane Street, Hudson River Trading, Two Sigma and VentureTech Alliance were also in the round and first disclosed on 30 June 2026.
-
$300m
Series C
Led by Sequoia at a $10.3bn valuation, with Andreessen Horowitz, Jane Street, Diffusion, Argo and SK hynix.
| Channel | Named participants | Entered / first public record | Position |
|---|---|---|---|
| Direct preferred holder | StepStone Private Venture and Growth Fund | Shares acquired 30 Dec 2025 | 67,513 preferred shares in the 31 Mar 2026 public schedule |
| Direct preferred holder | TriplePoint Private Venture Credit | Shares acquired 19 Apr 2024 | 307,570 preferred shares in the 31 Mar 2026 public schedule |
| CGF2021 / Sydecar vehicles | Etched AI Mar 2024; F&F Mar 2025; Series B F&F; Angels III; Angels IV | First sale 16 Apr 2024 (filed 23 Apr); filed 23 Jun 2025, 6 Feb 2026, 13 Jul 2026 and 15 Jul 2026 | Vehicles organised around Etched equity participation |
| Oceans Ventures vehicles | Etched I; Etched II; Etched III; Etched IV | Filed 23 May 2024; 29 Jan 2026; 29 Jan 2026; 6 Feb 2026 | Vehicles organised around Etched equity participation |
| Independent Etched SPV | Etched SPV, LLC; Benjamin Lincoln named as manager | Filed 27 Jan 2026 | $3.75m reported sold by the investment vehicle |
| Innova Etched LLC | Single-company Etched equity vehicle | Broker-reported position began 2 Jan 2026 | $500,000 restricted membership-interest position reported by one broker |
| TPVC debt / warrant | TriplePoint Private Venture Credit | Revolver and warrant acquired 18 Jul 2025 | $4.5m outstanding and $5.5m unfunded; a 12,110-share warrant |
| TPVG debt / warrant | TriplePoint Venture Growth BDC | Revolver acquired 18 Jul 2025; first shown in the 30 Sep 2025 schedule | $4.5m outstanding and $25.5m unfunded; a 12,110-share warrant |
| IP security | TriplePoint Capital | Effective 19 Apr 2024 and 18 Jul 2025 | Patent-security records |
04 / Supply chain
One system, built in layers
The product moves from chip design through processor and stacked memory manufacturing, assembly into one package, circuit-board production, server integration, rack power and liquid cooling.
- Design and IP
- Silicon and memory
- Package and test
- Board and server
- Power and cooling
- Deployment
The manufacturing records use L6 for a completed board, L10 for a complete server or tray, and L11 for a complete rack.
- Named relationship
Publicly identified work, platform or tool.
- Named production role
Publicly identified manufacturing function.
- Likely supply route
Best-fit supplier route for the component and process.
- Alternative route
Another credible source for the same component.
A
Design and IP
Turns the architecture into verified logic, interfaces, boards and mechanical designs.
| Component or work | Supplier routes |
|---|---|
| Executable specification and register automation | Named relationshipAgnisys — IDesignSpec and associated IP |
| Stacked-memory controller and physical signal interface | Named relationshipRambus |
| Hardware-assisted emulation | Named relationshipSynopsys ZeBu |
| Chip, PCB, mechanical and EM engineering tools | Named relationshipCadence Allegro and Innovus; Siemens NX; Ansys HFSS |
| Physical interface for high-bandwidth memory |
Likely supply routeCadence
Alternative routeSynopsys; Global Unichip
|
B
Silicon, memory, package and test
Makes the processor and stacked memory, combines their silicon pieces in one package, then tests the completed device.
| Component or work | Supplier routes |
|---|---|
| Logic silicon | Named relationshipTSMC N4P |
| High-bandwidth memory |
Named relationshipSK hynix — engineering samples and initial hardware testing
Likely supply routeSK hynix — production high-bandwidth memory
Alternative routeSamsung; Micron
|
| Combine processor and memory dies on one connecting layer and build the package |
Likely supply routeTSMC 3DFabric / CoWoS
Alternative routeASE / SPIL; Amkor
|
| Package substrate — the small circuit board beneath the silicon |
Likely supply routeUnimicron / UMTC; Ibiden; Toppan
Alternative routeKinsus; Nan Ya
|
| Build-up and reinforcement materials | Likely supply routeAjinomoto Fine-Techno; Nittobo; Mitsui; Resonac; MGC |
| Test each chip on the wafer, after packaging and in a working system |
Likely supply routeAdvantest V93000; Chroma
Alternative routeTSMC test; ASE; KYEC
|
C
Board, server and rack build
Mounts packaged accelerators on boards, builds complete servers and integrates the rack.
| Component or work | Supplier routes |
|---|---|
| Package, board, server and rack production | Named production roleLarge Taiwan contract manufacturer that builds hardware to Etched's design |
| Board/server materials and server development | Named production roleTaiwan-based joint design manufacturer that helps design and build the server |
| Server co-design and rack integration | Likely supply routeFoxconn / Ingrasys; Wistron / Wiwynn; Quanta / QCT; Pegatron |
| Server PCB |
Likely supply routeGold Circuit Electronics
Alternative routeCompeq; Unimicron; Zhen Ding
|
| Low-loss PCB laminate |
Likely supply routeTaiwan Union Technology
Alternative routeElite Material; ITEQ; Ventec
|
| Board voltage regulation |
Likely supply routeMonolithic Power Systems
Alternative routeInfineon; Renesas; Texas Instruments; onsemi
|
| PCIe retimers and switches | Likely supply routeBroadcom; Credo; Astera Labs |
| Connectors and cable harnesses | Likely supply routeTE Connectivity; Molex; Luxshare; Amphenol; Samtec; BizLink |
| Enclosures and rail systems |
Likely supply routeChenbro; King Slide
Alternative routeAIC; InWin
|
D
Rack power and liquid cooling
Delivers stable high-current power and removes heat from accelerators through a closed liquid loop.
| Component or work | Supplier routes |
|---|---|
| Rack power shelves |
Likely supply routeDelta Electronics
Alternative routeLITEON; Advanced Energy; AcBel
|
| Cold plates, manifolds and coolant distribution |
Likely supply routeAuras
Alternative routeAsia Vital Components; Delta; LITEON; CoolIT
|
| Quick-disconnect interface |
Named relationshipCPC and Etched — UQDv2 technical work
Likely supply routeCPC Everis UQD
Alternative routeStäubli; Danfoss Hansen; SITELIN
|
| Facility-side coolant distribution | Likely supply routeAuras; Delta; LITEON; CoolIT |
05 / Production
From design release to a running cluster
Each step adds physical hardware, test data and system-level control until the rack can run customer workloads.
- 01
Custom processor and memory design
Finish the processor logic, memory system, package and signal interfaces.
- 02
Processor, memory and package
Make the silicon, place stacked memory beside the processor and assemble the complete device.
- 03
Device test
Test each chip before cutting the wafer, after packaging and inside a working system.
- 04
Board and server build
Assemble accelerator boards, main boards and complete servers.
- 05
Rack integration
Install power, networking and liquid cooling, then run the rack under load to find early failures.
- 06
Customer operation
Deploy the cluster, load models and operate inference services.